PXS20RM Datasheet, PDF (700/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Flexible Motor Control Pulse Width Modulator Module (FlexPWM)
25.4.3.23 Capture Value 1 Cycle Register (CVAL1CYC)
PWM_SUB_
BASE+$3A
0
Read
0
Write
Reset
0
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
00000000000 0
CVAL1CYC
00000000000 0
Figure 25-58. Capture Value 1 Cycle Register (CVAL1CYC)
000
This read only register stores the cycle number corresponding to the value captured in CVAL1. The PWM
cycle is reset to 0 and is incremented each time the counter is loaded with the INIT value. This is actually
a 4 deep FIFO and not a single register.
25.4.4 Configuration registers
The base address of the configuration registers is equal to the base address of the mcPWM plus as offset
of $140.
25.4.4.1 Output Enable Register (OUTEN)
PWM_BASE
+$140
0
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15
Read
Write
0000
PWMA_EN
PWMB_EN
PWMX_EN
Reset
0000000000000000
Figure 25-59. Output Enable Register (OUTEN)
PWMA_EN - PWMA Output Enables
These bits enable the PWMA outputs of each submodule. These bits should be set to 0 (output
disabled) when a PWMA pin is being used for input capture.
1 = PWMA output enabled.
0 = PWMA output disabled.
PWMB_EN - PWMB Output Enables
These bits enable the PWMB outputs of each submodule. These bits should be set to 0 (output
disabled) when a PWMB pin is being used for input capture.
1 = PWMB output enabled.
0 = PWMB output disabled.
PWMX_EN - PWMX Output Enables
These bits enable the PWMX outputs of each submodule. These bits should be set to 0 (output
disabled) when a PWMX pin is being used for input capture or deadtime correction.
1 = PWMX output enabled.
0 = PWMX output disabled.
25-54
PXS20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor