PXS20RM Datasheet, PDF (713/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Chapter 26
FlexRay Communication Controller
FlexRay Communication Controller
26.1 Introduction
26.1.1 Reference
The following documents are referenced.
• FlexRay Communications System Protocol Specification, Version 2.1 Rev A¹
• FlexRay Communications System Electrical Physical Layer Specification, Version 2.1 Rev A
26.1.2 Glossary
This section provides a list of terms used in this chapter.
Table 26-1. List of Terms
Term
BCU
BMIF
CC
CDC
CHI
Cycle length in T
EBI
FlexRay memory area
system memory
System Bus
FSS
HIF
Host
LUT
MB
MBIDX
MBNum
MCU
T
MT
Definition
Buffer Control Unit. Handles message buffer access.
Bus Master Interface. Provides master access to FlexRay memory area.
FlexRay Communication Controller, module described in this chapter.
Clock Domain Crosser
Controller Host Interface
The actual length of a cycle in T for the ideal CC (+/- 0 ppm)
External Bus Interface
Memory area to store the physical message buffer payload data, frame header, frame
and slot status, and synchronization frame related tables.
Memory that contains the FlexRay memory area.
Bus that connects the CC and System Memory
Frame Start Sequence
Host Interface. Provides host access to the CC.
The FlexRay CC host CPU.
Look Up Table. Stores message buffer header index value.
Message Buffer
Message Buffer Index: the position of a header field entry within the header area. If the
header area is accessed as an array, this is the same as the array index of the entry.
Message Buffer Number: Position of message buffer configuration registers within the
register map. For example, Message Buffer Number 5 corresponds to the MBCCS5
register.
Microcontroller Unit
Microtick
Macrotick
1. The FlexRay Specifications have been developed for automotive applications.The FlexRay Specifications have been neither
developed nor tested for non-automotive applications.
Freescale Semiconductor
PXS20 Microcontroller Reference Manual, Rev. 1
26-1