PXS20RM Datasheet, PDF (765/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

FlexRay Communication Controller
NOTE
Both timers are deactivated immediately when the protocol enters a state
different from POC:normal active or POC:normal passive.
26.5.2.42 Timer 1 Cycle Set Register (FR_TI1CYSR)
Base + 0x005C
Write: Anytime
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R0 0
W
T1_CYC_VAL
00
T1_CYC_MSK
Rese
t
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 26-42. Timer 1 Cycle Set Register (FR_TI1CYSR)
This register defines the cycle filter value and the cycle filter mask for timer T1. For a detailed description
of timer T1, refer to Section 26.6.17.1, Absolute Timer T1.
Table 26-48. FR_TI1CYSR Field Descriptions
Field
Description
T1_CYC_VAL Timer T1 Cycle Filter Value — This field defines the cycle filter value for timer T1.
T1_CYC_MSK Timer T1 Cycle Filter Mask — This field defines the cycle filter mask for timer T1.
NOTE
If the application modifies the value in this register while the timer is
running, the change becomes effective immediately and timer T1 will expire
according to the changed value.
26.5.2.43 Timer 1 Macrotick Offset Register (FR_TI1MTOR)
Base + 0x005E
Write: Anytime
0
R0
W
Rese
t
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
0
T1_MTOFFSET
000000000000000
Figure 26-43. Timer 1 Macrotick Offset Register (FR_TI1MTOR)
This register holds the macrotick offset value for timer T1. For a detailed description of timer T1, refer to
Section 26.6.17.1, Absolute Timer T1.
Freescale Semiconductor
PXS20 Microcontroller Reference Manual, Rev. 1
26-53