PXS20RM Datasheet, PDF (811/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

FlexRay Communication Controller
26.6.3.4 Message Buffer Configuration and Control Data
This section describes the configuration and control data for each message buffer type.
26.6.3.4.1 Individual Message Buffer Configuration Data
Before an individual message buffer can be used for transmission or reception, it must be configured.
There is a set of common configuration parameters that applies to all individual message buffers and a set
of configuration parameters that applies to each message buffer individually.
Common Configuration Data
The set of common configuration data for individual message buffers is located in the following registers.
• Message Buffer Data Size Register (FR_MBDSR)
The MBSEG2DS and MBSEG1DS fields define the minimum length of the message buffer data
field with respect to the message buffer segment.
• Message Buffer Segment Size and Utilization Register (FR_MBSSUTR)
The LAST_MB_SEG1 and LAST_MB_UTIL fields define the segmentation of the individual
message buffers and the number of individual message buffers that are used. For more details, see
Section 26.6.3.1.1, Individual Message Buffer Segments.
Specific Configuration Data
The set of message buffer specific configuration data for individual message buffers is located in the
following registers.
• Message Buffer Configuration, Control, Status Registers (FR_MBCCSRn)
The MCM, MBT, MTD bits configure the message buffer type.
• Message Buffer Cycle Counter Filter Registers (FR_MBCCFRn)
The MTM, CHA, CHB bits configure the transmission mode and the channel assignment. The
CCFE, CCFMSK, and CCFVAL bits and fields configure the cycle counter filter.
• Message Buffer Frame ID Registers (FR_MBFIDRn)
For a transmit message buffer, the FID field is used to determine the slot in which the message in
this message buffer will be transmitted.
• Message Buffer Index Registers (FR_MBIDXRn)
This MBIDX field provides the index of the message buffer header field of the physical message
buffer that is currently associated with this message buffer.
26.6.3.5 Individual Message Buffer Control Data
During normal operation, each individual message buffer can be controlled by the control and trigger bits
CMT, LCKT, EDT, and MBIE in the Message Buffer Configuration, Control, Status Registers
(FR_MBCCSRn).
Freescale Semiconductor
PXS20 Microcontroller Reference Manual, Rev. 1
26-99