PXS20RM Datasheet, PDF (591/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Flash Memory
Table 23-25. PFCR0 field descriptions
Field
Description
B02_APC
Address Pipelining Control. This field is used to control the number of cycles between flash array
access requests. This field must be set to a value appropriate to the operating frequency of the
PFLASH. The value of this field must be greater than or equal to the values in the WWSC and
RWSC fields. Higher operating frequencies require non-zero settings for this field for proper flash
operation.
000 Accesses may be initiated on consecutive (back-to-back) cycles
001 Access requests require one additional hold cycle 010 Access requests require two additional
hold cycles ...
110 Access requests require six additional hold cycles
111 No Address Pipelining
Note: APC must equal RWSC.
Refer PFLASH Configuration Register 0 (PFCR0) settings for different frequencies table for values
at different frequencie.
B02_WWSC
Write Wait State Control. This field is used to control the number of wait-states to be added to the
flash array access time for writes. This field must be set to a value appropriate to the operating
frequency of the PFLASH. Higher operating frequencies require non-zero settings for this field for
proper flash operation. This field is set to an appropriate value by hardware reset.
00 No additional wait-states are added
01 1 additional wait-state is added
10 2 additional wait-states are added
11 3 additional wait-states are added
Refer PFLASH Configuration Register 0 (PFCR0) settings for different frequencies table for values
at different frequencies .
B02_RWSC
Read Wait State Control. This field is used to control the number of wait-states to be added to the
flash array access time for reads. This field must be set to a value corresponding to the operating
frequency of the PFLASH and the actual read access time of the PFLASH. Higher operating
frequencies require non-zero settings for this field for proper flash operation. The integrator is
strongly encouraged to verify these settings based on actual silicon results.
000 No additional wait-states are added
001 1 additional wait-state is added
010 2 additional wait-states are added
...
111 7 additional wait-states are added
Refer PFLASH Configuration Register 0 (PFCR0) settings for different frequencies table for values
at different frequencies.
Freescale Semiconductor
PXS20 Microcontroller Reference Manual, Rev. 1
23-41