PXS20RM Datasheet, PDF (184/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Analog-to-Digital Converter (ADC)
9.3.17.4 Self Test Baud Rate Register (STBRR)
Address: Base + 0x34C
Access: User read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R0 0 0 0 0 0 0 0 0 0 0 0 0
W
WDT
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R0 0 0 0 0 0 0 0
BR
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 9-28. Self Test Baud Rate Register (STBRR)
Table 9-30. STBRR field descriptions
Field
WDT
BR
Description
Watchdog timer value. This value is used to monitor that the algorithm sequence is correctly
executed within the safe time period. The self testing watchdog is enabled by setting the
STAWnR[WDTE] control bits. A fixed pre-scaler runs on the ADC clock (120 MHz).
000 0.1 ms
001 0.5 ms
010 1 ms
011 2 ms
100 5 ms
101 10 ms
110 20 ms
111 50 ms
Baud rate for the selected algorithm in scan mode (MCR[MODE] = 1). You should program
this field before enabling the self test channel.
0x00 Maximum scheduling rate (nominal rate)
...
0xFF Minimum scheduling rate (nominal rate scaled by 255)
9-26
PXS20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor