PXS20RM Datasheet, PDF (900/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Frequency-Modulated Phase-Locked Loop (FMPLL)
1100
1101
1110
1111
Table 27-3. Input divide ratios (continued)
IDF[3:0]
Input division factor (idf)
Divide by 13
Divide by 14
Divide by 15
Clock Inhibit
Table 27-4. Output Divide Ratios
ODF[1:0]
00
01
10
11
Output division factor (odf)
Divide by 2
Divide by 4
Divide by 8
Divide by 16
Table 27-5. Loop Divide Ratios
NDIV[6:0]
0000000-0011111
0100000
0100001
0100010
...
1011111
1100000
1100001-1111111
Loop divide factor (ldf)
NA
Divide by 32
Divide by 33
Divide by 34
...
Divide by 95
Divide by 96
NA
27-4
PXS20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor