PXS20RM Datasheet, PDF (555/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Flash Memory
23.1.5.3 C90FL Program
A flash program sequence operates on any page within the FC. Up to 4 words within the page may be
altered in a single program operation. Whenever the array is program, the ECC bits also get programmed.
ECC is handled on a 64 bit boundary. Thus, if only 1 word in any given 64 bit ECC segment is
programmed, the adjoining word (in that segment) should not be programmed since ECC calculation has
already completed for that 64-bit segment. Attempts to program the adjoining word results in an operation
failure (most likely). It is recommended that all programming operations be from 64 bits to 128 bits, and
be 64 bit aligned. The programming operation should completely fill selected ECC segments within the
page. Only one program is allowed per 64 bit ECC segment between erases.
CAUTION
The chosen ECC algorithm allows some bit manipulations so that a Double
Word can be re-written several times without needing an erase of the sector.
This allows to use a Double Word to store flags useful for the EEPROM
Emulation. As an example the chosen ECC algorithm allows to start from
an All ‘1’s Double Word value and rewrite whichever of its four 16-bit
Half-Words to an All ‘0’s content by keeping the same ECC value.
Programming changes the value stored in an array bit from logic 1 to logic 0 only. Programming cannot
change a stored logic 0 to a logic 1.
NOTE
If a logic 0 is attempted to be “over programmed” by a logic 1, the resulting
operation will fail (MCR[PEG] = 0), and the 0’s that are interlocked will be
merged (ORed) with 0’s that are already present in the 64 bit ECC segment.
Addresses in locked/disabled blocks cannot be programmed. The user may program the values in any or
all of 4 words, within a page, with a single program sequence. Page-bound words have addresses which
differ only in address bits [3:2]. The program operation consists of the following sequence of events:
1. Change the value in the MCR[PGM] bit from a 0 to a 1.
NOTE
Ensure the block that contains the address to be programmed is unlocked.
2. Write the first address to be programmed with the program data. The flash module latches address
bits [20:4] and chip-specific shadow enable at this time. The flash module latches data written as
well. This write is referred to as a program data interlock write. An interlock write may be as large
as 64 bits, and as small as 32 bits.
3. If more than 1 word or double word is to be programmed, write each additional address in the page
with data to be programmed. This is referred to as a program data write. The flash module ignores
address bits [20:4] and chip-specific shadow enable for program data writes. All unwritten data
words default to 0xffff ffff.
4. Write a logic 1 to the MCR[EHV] bit to start the internal program sequence or skip to step to
terminate.
5. Wait until the MCR[DONE] bit goes high.
6. Confirm MCR[PEG] = 1.
Freescale Semiconductor
PXS20 Microcontroller Reference Manual, Rev. 1
23-5