PXS20RM Datasheet, PDF (907/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Chapter 28
Interrupt Controller (INTC)
Interrupt Controller (INTC)
28.1 Introduction
28.1.1 Module overview
The interrupt controller (INTC) provides priority-based preemptive scheduling of interrupt requests. This
scheduling scheme is suitable for statically scheduled hard real-time systems. The INTC supports 256
interrupt requests. It is targeted to work with a Power Architecture processor and automotive powertrain
applications where the ISRs nest to multiple levels, but it also can be used with other processors and
applications.
For high priority interrupt requests in these target applications, the time from the assertion of the interrupt
request from the peripheral to when the processor is performing useful work to service the interrupt request
needs to be minimized. The INTC supports this goal by providing a unique vector for each interrupt
request source. It also provides 16 priorities so that lower priority ISRs do not delay the execution of higher
priority ISRs. Since each individual application will have different priorities for each source of interrupt
request, the priority of each interrupt request is configurable.
When multiple tasks share a resource, coherent accesses to that resource need to be supported. The INTC
supports the Priority Ceiling Protocol for coherent accesses. By providing a modifiable priority mask, the
priority can be raised temporarily so that all tasks which share the resource can not preempt each other.
Multiple processors can assert interrupt requests to each other through software settable interrupt requests.
These same software settable interrupt requests also can be used to break the work involved in servicing
an interrupt request into a high priority portion and a low priority portion. The high priority portion is
initiated by a peripheral interrupt request, but then the ISR can assert a software settable interrupt request
to finish the servicing in a lower priority ISR. Therefore these software settable interrupt requests can be
used instead of the peripheral ISR scheduling a task through the RTOS.
28.1.2 Block diagram
Figure 28-1 shows a block diagram of the interrupt controller (INTC).
Freescale Semiconductor
PXS20 Microcontroller Reference Manual, Rev. 1
28-1