PXS20RM Datasheet, PDF (798/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

FlexRay Communication Controller
26.5.2.72 ECC Error Report Address Register (FR_EERAR)
Base + 0x00F4
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R MID
BANK
ADDR
W
Rese
t
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 26-103. ECC Error Report Address Register (FR_EERAR)
This register provides the memory identifier, bank, and address for which the memory error is reported.
Table 26-82. FR_EERAR Field Descriptions
Field
MID
BANK
ADDR
Description
Memory Identifier — This flag provides the memory instance for which the memory error is
reported.
0 PE DRAM
1 CHI LRAM
Memory Bank — This field provides the BANK for which the memory error is reported.
000 reset value, updated to a valid value with the first ECC Error.
For MID=0:
000 BANK0: PE DRAM [7:0]
001 BANK1: PE DRAM [15:8]
others - not used
For MID=1:
000 BANK0: FR_MBCCFR(2n)
001 BANK1: FR_MBFIDR(2n)
010 BANK2: FR_MBIDXR(2n)
011 BANK3: FR_MBCCFR(2n+1)
100 BANK4: FR_MBFIDR(2n+1)
101 BANK5: FR_MBIDXR(2n+1)
others - not used
Memory Address — This field provides the address of the failing memory location.
26.5.2.73 ECC Error Report Data Register (FR_EERDR)
Base + 0x00F6
0
R
W
Rese
t
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
DATA
000000000000000
Figure 26-104. ECC Error Report Data Register (FR_EERDR)
This register provides the data related information of the reported memory read access. The assignment of
the bits depends on the selected memory and memory bank as shown in Table 26-84.
26-86
PXS20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor