PXS20RM Datasheet, PDF (1276/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Self-Test Control Unit (STCU)
Field
Bits 0:31
Table 42-15. STCU_LB_MISRRL field descriptions
Description
MISRRL: MISR Read low part
Contains the low word of the MISR obtained at the end of the LBIST
42.4.3.14 STCU LBIST MISR Read High Register (STCU_LB_MISRRH)
The STCU_LB_MISRRH registers report the MSB part of the MISR obtained at the end of each LBIST.
Address: Base + 0x0094 + (n × 0x20) ¹
Access: User read-only
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
R
MISRRH
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R
MISRRH
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 42-19. STCU LBIST MISR Read High Register (STCU_LB_MISRRH)
NOTES:
1 _{The n variable represents the repeated register blocks of the multiple LBISTs: n ranges from 0 up to 2.}
Field
Bits 0:31
Table 42-16. STCU_LB_MISRRH field descriptions
Description
MISRRH: MISR Read high part
Contains the high word of the MISR obtained at the end of the LBIST
42.5 LBIST partitioning
The LBIST partitioning scheme for cut1 and cut2/3 of this device is shown in Table 42-17 and
Table 42-18, respectively.
42-18
PXS20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor