PXS20RM Datasheet, PDF (445/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Peripheral
Clock
Prescaler
Primary
Input
Secondary
Input
Other
Counters
Input
Filter
Switch
Matrix/
Polarity
Select
Edge
Detect
WD Count
UP/DN
Counter
Enhanced Motor Control Timer (eTimer)
Output
Output
Disable
OFLAG
Control
Comparator Comparator
Control
Status &
Control
DMA I/F
Load
Hold CCCaCapapapttpuutturruerer1e1e11 CCCaCapapapttpututurruerer1e1e12 ^COMP1
COMP2
CMPLD1 CMPLD2
Figure 20-2. eTimer channel block diagram
20.2 Features
The eTimer module design includes these distinctive features:
• 6 16-bit counters/timers
• Count up/down
• Counters are cascadable
• Enhanced programmable up/down modulo counting
• Max count rate equals peripheral clock/2 for external clocks
• Max count rate equals peripheral clock for internal clocks
• Count once or repeatedly
• Counters are preloadable
• Compare registers are preloadable
• Counters can share available input pins
• Separate prescaler for each counter
• Each counter has capture and compare capability
• Continuous and single shot capture for enhanced speed measurement
• DMA support of capture registers and compare registers
• 24-bit watchdog capability to detect stalled quadrature counting
• OFLAG comparison for safety critical applications
• Programmable operation during debug mode and stop mode
Freescale Semiconductor
PXS20 Microcontroller Reference Manual, Rev. 1
20-3