PXS20RM Datasheet, PDF (558/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Flash Memory
during erase sequence interlock writes are ignored. The user may terminate the erase sequence by clearing
ERS before setting EHV.
An erase operation may be aborted by clearing EHV assuming DONE is low, EHV is high and ESUS is
low. An erase abort forces the module to step 8 of the erase sequence. An aborted erase results in PEG
being set low, indicating a failed operation. The block(s) being operated on before the abort contain
indeterminate data. The user may not abort an erase sequence while in erase suspend.
CAUTION
Aborting an erase operation leaves the FC blocks being erased in an
indeterminate data state. This may be recovered by executing an erase on the
affected blocks.
23.1.5.7 C90FL Erase Suspend/Resume
The erase sequence may be suspended to allow read access to the FC. The erase sequence may also be
suspended to program (Erase-Suspended Program) the FC. A program started during erase suspend can in
turn be suspended. Only one erase suspend and one program suspend are allowed at a time during an
operation. It is not possible to erase during an erase suspend, or program during a program suspend. During
suspend, all reads to FC locations targeted for program and blocks targeted for erase return indeterminate
data. Programming locations in blocks targeted for erase during erase-suspended program may result in
corrupted data. Read While Write may also be used to read the array during an erase sequence providing
the read is to a partition not selected for erase.
An erase suspend can be initiated by changing the value of the MCR[ESUS] bit from a 0 to a 1.
MCR[ESUS] can be set to a 1 at any time when MCR[ERS] and MCR[EHV] are high and MCR[PGM] is
low. A 0 to 1 transition of MCR[ESUS] causes the module to start the sequence which places it in erase
suspend. The user must wait until MCR[DONE] = 1 before the module is suspended and further actions
are attempted. MCR[DONE] goes high no more than Tesus after MCR[ESUS] is set to a 1. Once
suspended, the array may be read or a program sequence may be initiated (erase-suspended program).
Before initiating a program sequence the user must first clear MCR[EHV]. If a program sequence is
initiated the values of SOC specific shadow enable is recaptured. Once the erase-suspended program is
completed, the value of PEAS is returned to its “erase” value. FC reads while MCR[ESUS] = 1 from the
block(s) being erased return indeterminate data.
The erase sequence is resumed by writing a logic 0 to MCR[ESUS]. MCR[EHV] must be set to a 1 and
MCR[PGM] must be cleared (in the event of an erase suspended program) before MCR[ESUS] can be
cleared to resume the operation. The module continues the erase sequence from one of a set of predefined
points. This may extend the time required for the erase operation.
CAUTION
Repeated suspends at a high frequency may result in the operation timing
out, and the flash module will respond by completing the operation with a
fail code (MCR[PEG] = 0). The minimum time between erase suspends to
ensure this does not occur is 200 s.
23-8
PXS20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor