PXS20RM Datasheet, PDF (799/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

FlexRay Communication Controller
Field
DATA
Table 26-83. FR_EERDR Field Descriptions
Description
Data — The content of this field depends on the report mode selected by FR_EERICR[ERM]
ERM=0: Ecc Data, shows data as generated by the ecc decoding logic.
ERM=1: Memory Data, shows data as read from the memory.
Table 26-84. Valid Bits in FR_EERDR[DATA] / FR_EEIDR[DATA] field
MEM
BANK 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
PE DRAM 0
PE DRAM 1
CHI LRAM 0
CHI LRAM 1
CHI LRAM 2
CHI LRAM 3
CHI LRAM 4
CHI LRAM 5
PE DRAM[7:0]
PE DRAM[15:8]
FR_MBCCFR(2n)
FR_MBFIDR(2n)
FR_MBIDXR(2n)
FR_MBCCFR(2n+1)
FR_MBFIDR(2n+1)
FR_MBIDXR(2n+1)
26.5.2.74 ECC Error Report Code Register (FR_EERCR)
Base + 0x00F8
0
R0
W
Rese
t
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
0000000000
CODE
000000000000000
Figure 26-105. ECC Error Report Code Register (FR_EERCR)
This register provides the ecc related information of the reported memory read access.
Table 26-85. FR_EERSR Field Descriptions
Field
CODE
Description
Code — The content of this field depends on the report mode selected by FR_EERICR[ERM]
ERM=0: Syndrome. Shows the ecc syndrome generated by the ecc decoding logic.
The coding of the PE DRAM syndrome is shown in Section 26.6.24.2.2, PE DRAM Syndrome.
The coding of the CHI LRAM syndrome is shown in Section 26.6.24.2.4, CHI LRAM Syndrome.
ERM=1: Checkbits. Shows the ecc checkbits read from the memory.
Freescale Semiconductor
PXS20 Microcontroller Reference Manual, Rev. 1
26-87