PXS20RM Datasheet, PDF (1234/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Reset Generation Module (MC_RGM)
power-on
1.2 V low-voltage detected
1.2 V high-voltage detected
2.7 V low-voltage det. (VREG)
2.7 V low-voltage det. (flash)
2.7 V low-voltage det. (I/O)
Software ‘destructive’ reset
(cut2/3)
MC_RGM
Registers
Platform Interface
MC_ME
MC_CGM
peripherals
RESET_B
JTAG initiated reset
core reset
software ’functional’ reset
core watchdog reset
PLL0 fail
oscillator freq. too low
system clock freq. too high/low
FCCU SAFE mode request
software watchdog timer
PLL1 fail
flash, ECC, or lock-step error
CMU1/2 clock freq. too high/low
self-test completed
FCCU soft reaction request
FCCU hard reaction request
A[4:2]
Reset
State
Machine
core
Boot Mode
Capture
SSCM
Figure 41-1. MC_RGM block diagram
41.1.2 Features
The MC_RGM contains the functionality for the following features:
• ‘destructive’ resets management
• ‘functional’ resets management
• signalling of reset events after each reset sequence (reset status flags)
• conversion of reset events to SAFE mode or interrupt request events
• short reset sequence configuration
41-2
PXS20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor