PXS20RM Datasheet, PDF (602/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

FlexCAN Module
24.1.1 Overview
The CAN protocol was primarily, but not only, designed to be used as a vehicle serial data bus, meeting
the specific requirements of this field: real-time processing, reliable operation in the EMI environment of
a vehicle, cost-effectiveness and required bandwidth. The FlexCAN module is a full implementation of the
CAN protocol specification, Version 2.0 B, which supports both standard and extended message frames.
The Message Buffers are stored in an embedded RAM dedicated to the FlexCAN module.
The CAN Protocol Interface (CPI) sub-module manages the serial communication on the CAN bus,
requesting RAM access for receiving and transmitting message frames, validating received messages and
performing error handling. The Message Buffer Management (MBM) sub-module handles Message
Buffer selection for reception and transmission, taking care of arbitration and ID matching algorithms. The
Bus Interface Unit (BIU) sub-module controls the access to and from the internal interface bus, in order to
establish connection to the CPU and to other blocks. Clocks, address and data buses, interrupt outputs and
test signals are accessed through the Bus Interface Unit.
24.1.2 FlexCAN module features
The FlexCAN module includes these distinctive features:
• Full Implementation of the CAN protocol specification, Version 2.0B
– Standard data and remote frames
– Extended data and remote frames
– Zero to eight bytes data length
– Programmable bit rate up to 1 Mbit/s
– Content-related addressing
• 32 Message Buffers of zero to eight bytes data length
• Each MB configurable as Rx or Tx, all supporting standard and extended messages
• Individual Rx Mask Registers per Message Buffer
• Includes 544 bytes of RAM used for MB storage
• Includes 128 bytes (32 MBs) of RAM used for individual Rx Mask Registers
• Full featured Rx FIFO with storage capacity for 6 frames and internal pointer handling
• Powerful Rx FIFO ID filtering, capable of matching incoming IDs against either 8 extended, 16
standard or 32 partial (8 bits) IDs, with individual masking capability
• Selectable backwards compatibility with previous FlexCAN version
• Programmable clock source to the CAN Protocol Interface, either bus clock or crystal oscillator
• Unused MB and Rx Mask Register space can be used as general purpose RAM space
• Listen only mode capability
• Programmable loop-back mode supporting self-test operation
• Programmable transmission priority scheme: lowest ID, lowest buffer number or highest priority
• Time Stamp based on 16-bit free-running timer
• Global network time, synchronized by a specific message
24-2
PXS20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor