PXS20RM Datasheet, PDF (1240/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Reset Generation Module (MC_RGM)
41.3.1.1 Functional Event Status Register (RGM_FES)
Address 0xC3FE_4000
Access: User read, Supervisor read/write, Test read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
W w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c
Reset^* 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
* _{This register is reset if and only if one of thefollowing occurs:}
• Power up
• 1.2 V low-voltage detection (i.e. when the core voltage drops below the point at which the flip-flops can reliably retain
their value)
Figure 41-2. Functional Event Status Register (RGM_FES)
This register contains the status of the last asserted functional reset sources. Register bits are cleared as
follows:
• For cut1: On write ‘1’
• For cut2/3: On write ‘1’ if the triggering event has already been cleared at the source
NOTE
For cut2/3: If a ‘functional’ reset source is configured to generate a SAFE
mode request or an interrupt request, software needs to clear the event in the
source module at least three system clock cycles before it clears the
associated RGM_FES status bit in order to avoid multiple SAFE mode
requests or interrupts for the same event. In order to avoid having to count
cycles, it is good practice for software to check whether the RGM_FES has
been properly cleared, and if not, clear it again.
Table 41-3. Functional Event Status Register (RGM_FES) Field Descriptions
Field
F_EXR
F_FCCU_HARD
Description
Flag for External Reset
0 No external reset event has occurred since either the last clear or the last destructive
reset assertion
1 An external reset event has occurred
Flag for FCCU hard reaction request
0 No FCCU hard reaction request event has occurred since either the last clear or the last
destructive reset assertion
1 A FCCU hard reaction request event has occurred
41-8
PXS20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor