PXS20RM Datasheet, PDF (221/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Clock Generation Module (MC_CGM)
Table 11-2. MC_CGM memory map (continued)
Address
Name
0xC3FE_0390 CGM_AC2_SC
0xC3FE_0394 CGM_AC2_DC0
0xC3FE_0398 CGM_AC3_SC
0xC3FE_03A0 CGM_AC4_SC
0xC3FE_03A4
…
0xC3FE_3FFC
0 1 2 3 27 5 6 7 8 9 10 11 12 13 14 15
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R0 0 0 0
W
SELCTL
00000000
R0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
R
000
W
DIV0
00000000
R0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
R0 0 0 0
W
SELCTL
00000000
R0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
R0 0 0 0
W
SELCTL
00000000
R0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
reserved
11.3.1 Register descriptions
All registers may be accessed as 32-bit words, 16-bit half-words, or 8-bit bytes. The bytes are ordered
according to big endian. For example, the CGM_OC_EN register may be accessed as a word at address
0xC3FE_0370, as a half-word at address 0xC3FE_0372, or as a byte at address 0xC3FE_0373.
Freescale Semiconductor
PXS20 Microcontroller Reference Manual, Rev. 1
11-7