PXS20RM Datasheet, PDF (619/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

FlexCAN Module
LBUF — Lowest Buffer Transmitted First
This bit defines the ordering mechanism for Message Buffer transmission. When asserted, the
LPRIO_EN bit does not affect the priority arbitration. This bit must be written in Freeze mode only.
1 = Lowest number buffer is transmitted first
0 = Buffer with highest priority is transmitted first
LOM — Listen-Only Mode
This bit configures FlexCAN to operate in Listen Only Mode. In this mode, transmission is disabled,
all error counters are frozen and the module operates in a CAN Error Passive mode. Only messages
acknowledged by another CAN station will be received. If FlexCAN detects a message that has not
been acknowledged, it will flag a BIT0 error (without changing the REC), as if it was trying to
acknowledge the message. This bit must be written in Freeze mode only.
1 = FlexCAN module operates in Listen Only Mode
0 = Listen Only Mode is deactivated
PROPSEG — Propagation Segment
This 3-bit field defines the length of the Propagation Segment in the bit time. The valid programmable
values are 0–7. This bit must be written in Freeze mode only.
Propagation Segment Time = (PROPSEG + 1) * Time-Quanta.
Time-Quantum = one Sclock period.
24.3.4.3 Free Running Timer (TIMER)
This register represents a 16-bit free running counter that can be read and written by the CPU. The timer
starts from 0x0000 after Reset, counts linearly to 0xFFFF, and wraps around.
The timer is clocked by the FlexCAN bit-clock (which defines the baud rate on the CAN bus). During a
message transmission/reception, it increments by one for each bit that is received or transmitted. When
there is no message on the bus, it counts using the previously programmed baud rate. During Freeze Mode,
the timer is not incremented.
The timer value is captured at the beginning of the identifier field of any frame on the CAN bus. This
captured value is written into the Time Stamp entry in a message buffer after a successful reception or
transmission of a message.
Writing to the timer is an indirect operation. The data is first written to an auxiliary register and then an
internal request/acknowledge procedure across clock domains is executed. All this is transparent to the
user, except for the fact that the data will take some time to be actually written to the register. If desired,
software can poll the register to discover when the data was actually written.
Freescale Semiconductor
PXS20 Microcontroller Reference Manual, Rev. 1
24-19