PXS20RM Datasheet, PDF (1260/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Self-Test Control Unit (STCU)
Table 42-1. Acronyms and abbreviated terms (continued)
Term
Integrity SW
WDG
Meaning
Safety integrity software (a component within the Safety Integrity Subsystem)
Watchdog Timers
42.1.2 The Safety Integrity Subsystem
Figure 42-1 shows the STCU as a component of the Safety Integrity Subsystem on the device.
STCU Reset
Event
Integrity SW
FCCU
MC_RGM
LBIST Partitions
SSCM
STCU
MBIST Partitions
NVM
Component¹
Description
FCCU
The Fault Collection Control Unit collects errors and controls the safety state of the device.
Integrity SW The Safety Integrity Software checks the STCU status before passing control over to Apps
SW.
LBIST
Partitions
The set of individual logic block partitions included in the self test
MBIST
Partitions
The set of individual embedded memory blocks included in the self test
MC_RGM
Reset generation module
NVM
The flash nonvolatile memory contains the initial self-test parameters.
SSCM
The System Status and Configuration Module is the central control for device configuration
after reset.
STCU
The Self Test Control Unit manages the device self test.
STCU Reset
Event
The following reset events trigger the SSCM to activate the STCU:
• Power-on reset
• Destructive reset
• External reset
NOTES:
1 _{Components are the hardware and software that make up a subsystem. Events that affect subsystem}
behavior are also included.
Figure 42-1. The STCU within the Safety Integrity Subsystem
42-2
PXS20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor