PXS20RM Datasheet, PDF (70/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Memory Map
NOTES:
1 _{DMA_MUX_1 is disabled in DP mode.}
2 _{Test flash memory is mapped to this address if the SCTR[TFE] bit in the SSCM is set (see Section 48.3.1.9, SSCM}
Control Register (SCTR)).
3 _{This range cannot be accessed by eDMA_0.}
Table 2-3. SRAM map for PXS20 in LSM
Start address
End address
Size (KB)
Region¹
0x4000_0000
0x4001_FFFF
128
SRAM
0x4002_0000
0x5FFF_FFFF
524160
Reserved
NOTES:
1 _{Access to reserved memory space can cause unexpected behavior. The MPU must be configured to}
force a deterministic action for accesses to reserved memory space.
Table 2-4. SRAM map for PXS20 in DPM
Start address
End address
Size (KB)
Region¹
0x4000_0000
0x4001_0000
0x5000_0000
0x4000_FFFF
0x4FFF_FFFF
0x5000_FFFF
64
262080
64
SRAM
Reserved
SRAM²
0x5001_0000
0x5FFF_FFFF
262080
Reserved
NOTES:
1 _{Access to reserved memory space can cause unexpected behavior. The MPU must be configured to}
force a deterministic action for accesses to reserved memory space.
2 _{This range cannot be accessed by eDMA_0.}
PXS20 Microcontroller Reference Manual, Rev. 1
2-6
Freescale Semiconductor