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PXS20RM Datasheet, PDF (158/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller
Boot Assist Module (BAM)
c) ADC 0 Calibration Word 1 .. 8
d) ADC 1 Calibration Word 1 .. 8
e) Part ID 1 L/H
f) Part ID 2
However, accessing the Test Flash requires to set the SCTR TFE bit in the SSCM, which
• Will replace the “normal” Flash memory space with the Test Flash block (while TFE is set), and
• Is only possible one time after a reset of the device
Therefore retrieving these values usually requires several steps when performed by code stored in Flash:
1. Copying a corresponding function XYZ( ) to access this data from the “normal” Flash into RAM
2. Switching between “normal” Flash and Test Flash access by setting the SCTR TFE bit
3. Executing the function XYZ( ) to copy the data from Test Flash into RAM
4. Clear the SCTR TFE bit to switch back to “normal” Flash
This has been reported as inconvinient by customers, therefore a supporting function has been added to the
BAM, which will perform the corresponding actions. This function will copy the above factory settings
into a given memory location, without the need to copy the corresponding code into the RAM.
The location of this function is identified by a vector located in the location at address 0xFFFF_DFF0. This
function receives a 32-bit address, which specifies the start address of a 1024 byte wide buffer that will
receive the data to be retrieved. This function returns a 32 bit value that denotes either SUCCESS (value
0), an erroneous second attempt to access the Test Flash (value 4), or an erroneous access due to the fact
that the Test Flash is not available or can not be accessed due to other reasons (value 8). The provided
header file specifies a convenience function call macro READ_FROM_TF(<buffer_loc>,<result>) that
allows to call this function with its parameter <buffer_loc> and provides the return status in <result>. It
further specifies some convenience code to access the retrieved information.
NOTE
Since the “normal” Flash and related interrupt and/or exception handlers
defined in this memory space are not available during the runtime of this
function, it is the responsibility of the calling code to ensure that no
interrupts or exceptions can occur.
8.4.7 Inhibiting BAM operation
Under certain circumstances, you may want to inhibit BAM operation. To do this, set the ERROR[PAE]
bit in the SSCM (see Section 48.3.1.3, Error Configuration (ERROR)). Any attempt to access the memory
range occupied by the BAM will then result in an access error.
8.4.8 Interrupt
No interrupts are generated by or are enabled by the BAM.
8-16
PXS20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor