PXS20RM Datasheet, PDF (727/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Field
ECCE
FUM
FAM
CLKSEL
BITRATE
FlexRay Communication Controller
Table 26-8. FR_MCR Field Descriptions
Description
ECC Functionality Enable — This bit controls the ecc memory error detection functionality. For
details see Section 26.6.24, Memory Content Error Detection.
0 ECC functionality (injection, detection, reporting, response) disabled
1 ECC functionality enabled
FIFO Update Mode — This bit controls the FIFO update behavior when the interrupt flags
FR_GIFER[FAFAIF] and FR_GIFER[FAFBIF] are written by the application (see Section 26.6.9.8,
FIFO Update)
0 FIFOA/FIFOB is updated on writing 1 to FR_GIFER[FAFAIF] /FR_GIFER[FAFBIF]
1 FIFOA/FIFOB) is not updated on writing 1 to FR_GIFER[FAFAIF]/FR_GIFER[FAFBIF]
FIFO Address Mode — This bit controls the location of the system memory base address for the
FIFOs. (see Section 26.6.9.2, FIFO Configuration)
0 FIFO Base Address located in System Memory Base Address Register (FR_SYMBADR)
1 FIFO Base Address located in Receive FIFO System Memory Base Address Register
(FR_RFSYMBADR)
Protocol Engine Clock Source Select — This bit is used to select the clock source for the
protocol engine.
0 PE clock source is generated by on-chip crystal oscillator.
1 PE clock source is generated by on-chip FMPLL.
FlexRay Bus Bit Rate — This bit field defines the FlexRay Bus Bit Rate.
000 10.0 Mbit/sec
001 5.0 Mbit/sec
010 2.5 Mbit/sec
011 8.0 Mbit/sec
100 reserved
101 reserved
110 reserved
111 reserved
Table 26-9. FlexRay Channel Selection
SCM CHB CHA
Description
Dual Channel Device Modes
0 0 0 ports CA_RX, CA_TX, and CA_TR_EN not driven by CC
ports CB_RX, CB_TX, and CA_TR_EN not driven by CC
0 1 ports CA_RX, CA_TX, and CA_TR_EN driven by CC - connected to FlexRay channel A
ports CB_RX, CB_TX, and CA_TR_EN not driven by CC
1 0 ports CA_RX, CA_TX, and CA_TR_EN not driven by CC
ports CB_RX, CB_TX, and CA_TR_EN driven by CC - connected to FlexRay channel B
1 1 ports CA_RX, CA_TX, and CA_TR_EN driven by CC - connected to FlexRay channel A
ports CB_RX, CB_TX, and CA_TR_EN driven by CC - connected to FlexRay channel B
Single Channel Device Mode
1 0 0 ports CA_RX, CA_TX, and CA_TR_EN not driven by CC
ports CB_RX, CB_TX, and CA_TR_EN not driven by CC
0 1 ports CA_RX, CA_TX, and CA_TR_EN driven by CC - connected to FlexRay channel A
ports CB_RX, CB_TX, and CA_TR_EN not driven by CC
1 0 ports CA_RX, CA_TX, and CA_TR_EN driven by CC - connected to FlexRay channel B
ports CB_RX, CB_TX, and CA_TR_EN not driven by CC
1 1 reserved
Freescale Semiconductor
PXS20 Microcontroller Reference Manual, Rev. 1
26-15