PXS20RM Datasheet, PDF (1111/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Nexus Crossbar Slave Port Data Trace Module (NXSS) [cut2/3 only]
33.5 NXSS programmer model
This section describes the programmer model. Nexus registers are accessed using the JTAG port in
compliance with IEEE 1149.1.
Table 33-1. Registers available in the NXSS programmer model
Register¹
Development Control 1 (DC1_n)
Development Control 2 (DC2_n)
Watchpoint Trigger (WT_n)
Data Trace Control (DTC_n)
Data Trace Start Address 1 (DTSA1_n)
Data Trace Start Address 2 (DTSA2_n)
Data Trace End Address 1 (DTEA1_n)
Data Trace End Address 2 (DTEA2_n)
Breakpoint/Watchpoint Control Register 1 (BWC1_n)
Breakpoint/Watchpoint Control Register 2 (BWC2_n)
Breakpoint/Watchpoint Address Register 1 (BWA1_n)
Breakpoint/Watchpoint Address Register 2 (BWA2_n)
NOTES:
1 _{All registers have read/write access.}
Nexus access Read
Write
opcode
address address
Location
0x2
0x3
0xB
0xD
0xE
0xF
0x12
0x13
0x16
0x17
0x1E
0x1F
0x04
0x06
0x16
0x1A
0x1C
0x1E
0x24
0x26
0x2C
0x2E
0x3C
0x3E
0x05
0x07
0x17
0x1B
0x1D
0x1F
0x25
0x27
0x2D
0x2F
0x3D
0x3F
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33.5.1 Development Control Registers (DC1 and DC2)
The Development Control Registers (DC1 and DC2) control the basic development features of the
NXSS_0 and NXSS_1 modules.
Access: R/W
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R OPC 0 0
W
EOC
00
00000000
WEN
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R0 0 0 0 0 0 0 0 0 0 0
EIC
TM
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 33-2. Development Control Register 1 (DC1)
Freescale Semiconductor
PXS20 Microcontroller Reference Manual, Rev. 1
33-3