PXS20RM Datasheet, PDF (673/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Flexible Motor Control Pulse Width Modulator Module (FlexPWM)
PWMAFS[1]
Disable
PWMA
PWMAFS[0]
1 ^PWMA_EN
PWM23
0 _POLA
from Deadtime
logic
PWMA output
PWM45
0 ^POLB
PWMBFS[0]
1 _{PWMB_EN}
PWMB
Disable
PWMBFS[1]
PWMB output
Figure 25-25. Output Logic Section
25.3.3.10 E-Capture
Commensurate with the idea of controlling both edges of an output signal, the Enhanced Capture
(E-Capture) logic is designed to measure both edges of an input signal. As a result, when a submodule pin
is configured for input capture, the CVALx registers associated with that pin are used to record the edge
values.
Figure 25-26 illustrates the block diagram of the E-Capture circuit. Upon entering the pin input, the signal
is split into two paths. One goes straight to a mux input where software can select to pass the signal directly
to the capture logic for processing. The other path connects the signal to an 8 bit counter which counts
both the rising and falling edges of the signal. The output of this counter is compared to an 8 bit value that
is specified by the user (EDGCMPx) and when the two values are equal, the comparator generates a pulse
that resets the counter. This pulse is also supplied to the mux input where software can select it to be
processed by the capture logic. This feature permits the E-Capture circuit to count up to 256 edge events
before initiating a capture event. this feature is useful for dividing down high frequency signals for capture
processing so that capture interrupts don’t overwhelm the CPU. Also, this feature can be used to simply
generate an interrupt after "n" events have been counted.
Freescale Semiconductor
PXS20 Microcontroller Reference Manual, Rev. 1
25-27