PXS20RM Datasheet, PDF (561/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Flash Memory
2. Select the block, or blocks to be receive array integrity check by writing ones to the appropriate
registers in LMS or HBS registers.
NOTE
Locked Blocks can be tested with Array Integrity if selected in LMS and
HBS.
It is not possible to do UTest operations on the shadow block.
While Array Integrity is being executed, flash memory array accesses thru
the BIU should not be requested.
3. If desired, set the UT0[AIS] bit to 1 for sequential addressing only.
NOTE
For normal integrity checks of the flash memory, sequential addressing is
recommended.
If it is required to more fully check the read path (in a diagnostic mode), it
is recommend that AIS be left at 0, to use the address sequence that checks
the read path more fully, and examine read transitions. This sequence takes
more time.
4. Seed the MISR UM0 thru UM4 with desired values.
5. Set the UT0[AIE] bit.
If desired, the Array Integrity operation may be aborted prior to UT0[AID] going high. This may
be done by clearing the UT0[AIE] bit and then continuing to the next step. It should be noted that
in the event of an aborted array integrity check the MISR registers will contain a signature for the
portion of the operation that was completed prior to the abort, and will not be deterministic. Prior
to doing another array integrity operation, the UM0, UM1, UM2 and UM3 registers may need to
be initialized to the desired seed value by doing register writes.
6. Wait until the UT0[AID] bit goes high.
7. Read values in the MISR registers (UM0 through UM4) to ensure correct signature.
8. Write a logic 0 to the UT0[AIE] bit.
23.1.5.12 ECC logic check
ECC logic can be checked by providing data to be read in the UT0[DSI], UT1[DAI] and/or UT2[DAI]
registers. Then array reads can be done, ensuring expected results. The ECC logic check consists of the
following sequence of events:
1. Enable UTest mode.
2. Write UT0[EIE] to 1.
3. Write UT0[DSI], UT1[DAI] and/or UT2[DAI] bits to provide data and check bit values to be read.
Single or Double bit detections/corrections can be simulated by properly choosing Data and Check
Bit combinations.
4. Write double word address to receive the data inputted in step 3 into the ADR register.
Freescale Semiconductor
PXS20 Microcontroller Reference Manual, Rev. 1
23-11