PXS20RM Datasheet, PDF (1174/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Power Management Unit (PMU)
of the block is logic “1” which indicates the availability of the external NPN. Along with this circuit an
option byte might also available to give the information about the availability of external NPN.
39.5 Power-up and initialization
After the device powers up, the PMU:
• Automatically detects whether an external ballast is present
• Applies the factory-specified trimming to the output
• Performs the built-in self-test (BIST)
The high-voltage detector is disabled while the PMU is initializating (detecting the external ballast and
applying proper trimming), especially during the phase where the switchover occurs. Therefore, if during
that time there is an overshoot of the 1.2 V supply, no reset is triggered.
39.6 Built In self-test (BIST)
The PMU provides (to the user) the software capability to check the run of the BIST procedure, generating
non-critical faults (NCFs) or critical faults (CF) conditions for the FCCU module.
To provide the necessary redundancy, the logic AND of the two comparator outputs (from the main and
back-up circuitries) is used as global system reset.
At each power-on, the self-test circuitry is able to detect a failure of one of the two LVDs and to provide
an NCF to the FCCU.
The BIST flow is shown in Figure 39-2. The BIST execution is controlled by the
PMUCTRL_CTRL[SILHT] field.
Write SILHT = 01
IDLE MODE
(SILHT = 00)
Write SILHT = 10
LVD
TEST MODE
(SILHT = 01)
Automatically at the
end of test
HVD
TEST MODE
(SILHT = 10)
Figure 39-2. Built-In self test flow
Table 39-2 shows the critical and non-critical faults generated by the PMU during BIST mode.
39-4
PXS20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor