PXS20RM Datasheet, PDF (443/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Enhanced Motor Control Timer (eTimer)
Chapter 20
Enhanced Motor Control Timer (eTimer)
20.1 Introduction
This device contains up to three¹ eTimer modules, referred to as eTimer_0, eTimer_1, and eTimer_2.
All eTimer modules have 6 channels. eTimer_0 also has a watchdog timer function.
Each 16 bit counter/timer channel contains a prescaler, a counter, a load register, a hold register, two
queued capture registers, two compare registers, two compare preload registers, and four control registers.
NOTE
This document uses the terms “Timer” and “Counter” interchangeably
because the counter/timers may perform either or both tasks.
The Load register provides the initialization value to the counter when the counter’s terminal value has
been reached. For true modulo counting the counter can also be initialized by the CMPLD1 or CMPLD2
registers.
The Hold register captures the counter’s value when other counters are being read. This feature supports
the reading of cascaded counters coherently.
The Capture registers enable an external signal to take a “snap shot” of the counter’s current value.
The COMP1 and COMP2 registers provide the values to which the counter is compared. If a match occurs,
the OFLAG signal can be set, cleared, or toggled. At match time, an interrupt is generated if enabled, and
the new compare value is loaded into the COMP1 or COMP2 registers from CMPLD1 and CMPLD2 if
enabled.
The Prescaler provides different time bases useful for clocking the counter/timer.
The Counter provides the ability to count internal or external events.
Within the eTimer module (set of 6 timer/counter channels) the input pins are shareable.
The eTimer block diagram is shown in Figure 20-1.
1.Two in the 144-pin package, three in the 257-pin package.
Freescale Semiconductor
PXS20 Microcontroller Reference Manual, Rev. 1
20-1