PXS20RM Datasheet, PDF (1022/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

LIN Controller (LINFlexD)
31.10.17 Identifier filter enable register (IFER)
Offset: 0x40
Access: User read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R0 0 0 0 0 0 0 0
W
FACT¹
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1 _{This field is writable only in Initialization mode (LINCR1[INIT] = 1).}
Figure 31-34. Identifier filter enable register (IFER)
Table 31-30. IFER field descriptions
Field
FACT
Description
Filter activation (see Table 31-31)
The software sets the bit FACT[x] to activate the filters x in identifier list mode.
In identifier mask mode bits FACT(2n + 1) have no effect on the corresponding filters as they act as
masks for the Identifiers 2n.
0 Filters 2n and 2n + 1 are deactivated.
1 Filters 2n and 2n + 1 are activated.
Bit
FACT[0]
FACT[1]
FACT[2]
FACT[3]
FACT[4]
FACT[5]
Table 31-31. IFER[FACT] configuration
Value
0
1
0
1
0
1
0
1
0
1
0
1
Result
Filters 0 and 1 are deactivated.
Filters 0 and 1 are activated.
Filters 2 and 3 are deactivated.
Filters 2 and 3 are activated.
Filters 4 and 5 are deactivated.
Filters 4 and 5 are activated.
Filters 6 and 7 are deactivated.
Filters 6 and 7 are activated.
Filters 8 and 9 are deactivated.
Filters 8 and 9 are activated.
Filters 10 and 11 are deactivated.
Filters 10 and 11 are activated.
31-46
PXS20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor