PXS20RM Datasheet, PDF (252/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Cross-Triggering Unit (CTU)
PWM_REL
PWM_ODD_x
PWM_EVEN_x
RPWM_x
CTU Clock (as PWM)
TGS Counter Compare Register TGS Counter Comparator
TGS Counter STOP Signal
Prescaler (1, 2, 3, 4)
Event Signal
OR
TGS Counter
TGS Counter Reload Register
ETIMER0_IN
ETIMER1_IN
EXT_IN
Triggers Compare Registers
(double-buffered)
Mux
Comparators
Input Selection
32-bit Register
Master Reload Selection
(5 bits in TGS Control Register)
Clock (ES) _{3-bit Counter}
Master Reload Signal (MRS)
Reset (MRS)
Figure 13-5. TGS in sequential mode
An example timing diagram for TGS in sequential mode is shown in Figure 13-6. The red arrows indicate
the MRS occurrences and ES occurrences, while the black arrows indicate the trigger event occurrences
with the relevant delay in respect to the ES occurrence. The first red arrow indicates the first ES occurrence
which is also the MRS.
Delay T₀
Delay T₁
Delay T₂
Delay T₃
Figure 13-6. Example timing for TGS in sequential mode
13.4.6 TGS counter
The TGS counter is able to count from negative to positive, i.e. from 0x8000 to 0x7FFF. Figure 13-7 shows
examples in order to explain the TGS counter counts. The compare operation to stop the TGS counter is
not enabled during the first counting cycle, in order to allow the counting, if the value of the TGSCRR is
the same as the value of the TGSCCR.
13-6
PXS20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor