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PXS20RM Datasheet, PDF (1044/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller
LIN Controller (LINFlexD)
• Support high UART baud rate (at least 2 Mb/s) without overrun events
The Rx FIFO size is:
• 4 bytes in 8-bit data format
• 2 half-words in 16-bit data format
This is sufficient because just one byte allows a reaction time of about 3.8 s (at 2 Mbit/s), corresponding
to about 450 clock cycles at 120 MHz, before the transmission is affected. A DMA request is triggered by
FIFO not empty (RX) status signals.
The concept FSM to control the DMA Rx interface is shown in Figure 31-54. DMA Rx FSM will move
to idle state if DMARXE[0] = 0.
31-68
PXS20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor