PXS20RM Datasheet, PDF (1361/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Wakeup Unit (WKPU)
Address: 0x0000
Access: User read/write (write 1 to clear)
0
1
2
3
4
5
6
7
R NIF0
NOVF0
0
0
0
0
0
0
W w1c
w1c
Reset
0
0
0
0
0
0
0
0
8
R
0
9
10
11
12
13
14
15
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
R
0
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
24
25
26
27
28
29
30
31
R
0
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
Figure 51-3. NMI Status Flag Register (NSR)
Table 51-2. NSR Field Descriptions
Field
NIF0
NOVF0
Description
NMI Status Flag 0. This flag can be cleared only by writing a 1. Writing a 0 has no effect. If enabled
(NREE0 or NFEE0 set), NIF0 causes an interrupt request.
1 An event as defined by NREE0 and NFEE0 has occurred
0 No event has occurred on the pad
NMI Overrun Status Flag 0. This flag can be cleared only by writing a 1. Writing a 0 has no effect. It
will be a copy of the current NIF0 value whenever a NMI event occurs, thereby indicating to the
software that a NMI occurred while the last one was not yet serviced. If enabled (NREE0 or NFEE0
set), NOVF0 causes an interrupt request.
1 An overrun has occurred on NMI pin
0 No overrun has occurred on NMI pin
51.3.2.2 NMI Configuration Register (NCR)
This register holds the configuration bits for the non-maskable interrupt settings.
Freescale Semiconductor
PXS20 Microcontroller Reference Manual, Rev. 1
51-3