PXS20RM Datasheet, PDF (128/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Operating Modes
To make the second core operational, you must configure the following two registers in the SSCM:
• DPMBOOT (see Section 48.3.1.6, DPM Boot Register (DPMBOOT))
• DPMKEY (see Section 48.3.1.7, Boot Key Register (DPMKEY))
Follow this sequence to enable DPM:
• Write the reset vector into DPMBOOT[P2BOOT].
• Set DPMBOOT[DVLE] to indicate that the second core will be executing in VLE mode.
(Otherwise, the core will operate in Power Architecture mode.)
• Write 0x5AF0 to DPMKEY[KEY].
• Write 0xA50F to DPMKEY[KEY].
After the second write to DPMKEY[KEY], Core_1 starts execution from its reset vector. Repeating this
sequence after Core_1 is running will have no effect on Core_1 until the next reset, and only then if the
reset is a short external or short “functional” reset.
PXS20 Microcontroller Reference Manual, Rev. 1
4-4
Freescale Semiconductor