PXS20RM Datasheet, PDF (1147/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Oscillators
35.2.2 NVM interface
The NVM provides the XOSC with initial configuration information based on the flash memory option bit
located at BIU4[1], the XOSC oscillation margin bit, as follows:
• If BIU4[1] = 1, the oscillation margin is higher, but the XOSC consumes more power.
• If BIU4[1] = 0, the oscillation margin is lower, and the XOSC consumes less power.
See the data sheet for the recommended value based on the oscillator frequency.
35.2.3 Register description
Offset 0x0
Access: User read
Supervisor read/write
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
R
0000000
W
EOCV
RESET: ₀
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
0000000
0
W
RESET: ₀
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
= Unimplemented or reserved
Figure 35-2. External Crystal Oscillator Control Register (OSC_CTL)
NOTES:
1 _{You can read this field, and you can write a value of “1” to it. Writing a “0” has no effect. A reset will also clear this bit.}
2 _{You can write a value of "0" or "1" to this field. However, writing a "1" will clear this field, and writing "0" will have no}
effect on the field value.
Freescale Semiconductor
PXS20 Microcontroller Reference Manual, Rev. 1
35-3