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PXS20RM Datasheet, PDF (309/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller
Crossbar Switch (XBAR)
Each master port has an mX_high_priority input which can be enabled by writing the correct data to the
SGPCR. If a master’s mX_high_priority input is enabled for a slave port programmed for round-robin
mode, that master can force the slave port into fixed priority mode by asserting its mX_high_priority
input while making a request to that particular slave port. While that (or any enabled) master’s
mX_high_priority input is asserted while making an access attempt to that particular slave port, the slave
port will remain in fixed priority mode. Once that (or any enabled) master’s mX_high_priority input is
negated, or the master no longer attempts to make accesses to that particular slave port, the slave port will
revert back to round-robin priority mode and the pointer will be set on the last master to access the slave
port.
15.4.2 Priority Assignment
Each master port needs to be assigned a unique 3-Bit priority level. If an attempt is made to program
multiple master ports with the same priority level within a register (MPR) the XBAR will respond with an
error and the registers will not be updated.
15.4.2.1 Context Switching
The XBAR has a hardware input per slave port (sX_ampr_sel) which is used to select which registers the
master priority levels and general purpose control bits will be taken from. When sX_ampr_sel is 0 the
MPR and SGPCR will be selected. This hardware input is useful for context switching so the user does not
have to rewrite the MPR or SGPCR if a particular slave port would temporarily benefit from modifying
the master priority levels or functions affected by the bits in the SGPCR.
15.4.2.2 Priority Elevation
The XBAR has a hardware input per master port (mX_high_priority) which is used to temporarily elevate
the master’s priority level on all slave ports. When the master’s mX_high_priority input is asserted the
master port will automatically have higher priority than all other master ports that do not have their
mX_high_priority input asserted regardless of the priority levels programmed in the MPR and AMPR. If
multiple master ports have their mX_high_priority input asserted they will have higher priority than all
master ports which do not have their mX_high_priority inputs asserted. The MPR priority level
(dependent on the state of sX_ampr_sel) will determine which master port that has its mX_high_priority
input asserted has the highest priority on a slave port by slave port basis.
This functionality is useful because it allows the user to automatically elevate a master port’s priority level
throughout the XBAR in order to quickly perform temporary tasks such as servicing interrupts.
Please note that the HPEx bits must be set in the SGPCR in the slave port in order for the
mX_high_priority inputs to be received by the slave port.
15.4.3 Master Port Functionality
15.4.3.1 General
Each master port consists of two decoders, a capture unit, a register slice, a mux and a small state machine.
Freescale Semiconductor
PXS20 Microcontroller Reference Manual, Rev. 1
15-15