PXS20RM Datasheet, PDF (522/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Fault Collection and Control Unit (FCCU)
Offset: 0x0B4
Access: User read/write¹
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
TO[31:16]
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R
TO[15:0]
W
Reset 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
1 _{Writable only in the CONFIG state}
Figure 22-17. FCCU NCF Time-out Register (FCCU_NCF_TO)
Table 22-16. FCCU_NCF_TO field descriptions
Field
TO
Non-critical fault timeout
Description
Timeout = TO  T_RC16MHz
22.6.15 FCCU CFG Timeout Register (FCCU_CFG_TO)
The FCCU_CFG_TO register defines the preset value of the watchdog timer for the recovery from the
CONFIG state. Once FCCU enters in CONFIG state, following a SW request (OP1 opcode), the watchdog
timer is initialized and starts the countdown if the reset is not asserted.
If the configuration is not completed within the time-out, the FCCU moves automatically from the
CONFIG state to the NORMAL state and the default values for the configuration register is restored. The
watchdog time-out is clocked with the IRCOSC clock (16 MHz). The default time-out value is 4,096 ms.
The FCCU_CFG_TO register is accessible in write mode, in any state excluded the CONFIG state as
follows the execution of the OP1 opcode (NORMAL to CONFIG state) and until the completion of the
OP2 opcode (CONFIG to NORMAL state).
In case of watchdog time-out the FCCU_CFG_TO register is not accessible until the OP14 operation
(CONFIG to NORMAL) has been completed.
22-22
PXS20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor