PXS20RM Datasheet, PDF (715/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

FlexRay Communication Controller
Peripheral
Bridge B
System
Memory
FLEXRAY
CHI
HIF
config
PE
SEQ
SEARCH
TxA
LUT
System Bus
BCU
BMIF
RxA
TCU
CA_RX
CA_TX
CA_TR_E
CB_RX
CB_TX
CB_TR_E
DBG0
DBG1
DBG2
DBG3
Figure 26-1. FLEXRAY block diagram
The protocol engine has two transmitter units TxA and TxB and two receiver units RxA and RxB for
sending and receiving frames through the two FlexRay channels. The time control unit (TCU) is
responsible for maintaining global clock synchronization to the FlexRay network. The overall activity of
the PE is controlled by the sequencer engine (SEQ).
The CC host interface provides host access to the module’s configuration, control, and status registers, as
well as to the message buffer configuration, control, and status registers. The message buffers themselves,
which contain the frame header and payload data received or to be transmitted, and the slot status
information, are stored in the FlexRay memory area.
The clock domain crossing unit implements signal crossing from the CHI clock domain to the PE clock
domain and vice versa, to allow for asynchronous PE and CHI clock domains.
The CC stores the frame header and payload data of frames received or of frames to be transmitted in the
FlexRay memory area. The application accesses the FlexRay memory area to retrieve and provide the
frames to be processed by the CC. In addition to the frame header and payload data, the CC stores the
synchronization frame related tables in the FlexRay memory area for application processing.
The FlexRay memory area is located in the system memory of the MCU. The CC has access to the FlexRay
memory area via its bus master interface (BMIF). The host provides the start address of the FlexRay
memory area within the system memory by programming the System Memory Base Address Register
(FR_SYMBADR). All FlexRay memory area related offsets are stored in offset registers. The physical
address pointer into the FlexRay memory area of the MCU system memory is calculated using the offset
values the FlexRay memory area base address.
FlexRay interacts with the CTU as described in Section 13.4.1, Interaction with other peripherals.
Freescale Semiconductor
PXS20 Microcontroller Reference Manual, Rev. 1
26-3