PXS20RM Datasheet, PDF (688/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Flexible Motor Control Pulse Width Modulator Module (FlexPWM)
1 = Buffered registers of this submodule are loaded and take effect immediately upon LDOK being
set.
0 = Buffered registers of this submodule are loaded and take effect at the next PWM reload if LDOK
is set.
DBLEN - Double Switching Enable
This read/write bit enables the double switching PWM behavior.
1 = Double switching enabled.
0 = Double switching disabled.
25.4.3.5 Value Register 0 (VAL0)
PWM_SUB_
BASE+$8
0
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15
Read
Write
VAL0
Reset
000000000000 0 000
Figure 25-39. Value Register 0 (VAL0)
The 16-bit signed value in this buffered, read/write register defines the mid-cycle reload point for the
PWM in PWM clock periods. This value also defines when the PWMX signal is set and the local sync
signal is reset. This register is not byte accessible.
NOTE
The VAL0 register is buffered. The value written does not take effect until
the LDOK bit is set and the next PWM load cycle begins or LDMOD is set.
VAL0 cannot be written when LDOK is set. Reading VAL0 reads the value
in a buffer. It is not necessarily the value the PWM generator is currently
using.
25.4.3.6 Value Register 1 (VAL1)
PWM_SUB_
BASE+$A
0
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15
Read
Write
VAL1
Reset
000000000000 0 000
Figure 25-40. Value Register 1 (VAL1)
The 16-bit signed value written to this buffered, read/write register defines the modulo count value
(maximum count) for the submodule counter. Upon reaching this count value, the counter will reload itself
with the contents of the INIT register and assert the local sync signal while resetting PWMX. This register
is not byte accessible.
25-42
PXS20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor