PXS20RM Datasheet, PDF (230/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Clock Generation Module (MC_CGM)
11.3.1.12 Auxiliary Clock 4 Select Control Register (CGM_AC4_SC)
Address 0xC3FE_0390
Access: User read, Supervisor read/write, Test read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R0
0
0
0
W
SELCTL
0
0
0
0
0
0
0
0
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 11-14. Auxiliary Clock 4 Select Control Register (CGM_AC4_SC)
This register is used to select the current clock source for the FMPLL1 reference clock.
See Figure 11-20 for details.
Table 11-14. Auxiliary Clock 4 Select Control Register (CGM_AC4_SC) Field Descriptions
Field
Description
SELCT
L
Auxiliary Clock 4 Source Selection Control — This value selects the current source for auxiliary clock 4.
0000 16 MHz int. RC osc.
0001 4-40 MHz crystal osc.
0010 reserved
0011 reserved
0100 reserved
0101 reserved
0110 reserved
0111 reserved
1000 reserved
1001 reserved
1010 reserved
1011 reserved
1100 reserved
1101 reserved
1110 reserved
1111 reserved
11.4 Functional description
11.4.1 System clock generation
Figure 11-15 shows the block diagram of the system clock generation logic. The MC_ME provides the
system clock select and switch mask (see MC_ME documentation for more details), and the MC_RGM
provides the safe clock request (see MC_RGM documentation for more details). The safe clock request
forces the selector to select the 16 MHz int. RC osc. as the system clock and to ignore the system clock
select.
11-16
PXS20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor