PXS20RM Datasheet, PDF (1045/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

UART RX buffer (FIFO mode)
TIMEOUT config
Set RXEN
Enables DMA RX
channel request
(DMAERQH, DMAERQL)
LIN Controller (LINFlexD)
!RFE & DMA_REN
?
True
False
TIMEOUT restart
DMA RX transfer (Req/Ack) from
UART RX FIFO to RAM area
True
DMA RX
(major loop) done
?
False
DMA RX
(minor loop) done
?
True
False
False
!RFE
?
False
TIMEOUT
?
True
Set TIMEOUT flag
True
Figure 31-54. FSM to control the DMA RX interface (UART node)
The TCD settings (typical case) are shown in Table 31-49. All other TCD fields = 0. The minor loop
transfers a single byte/half-word as soon an entry is available in the Rx FIFO. A new software reset bit is
Freescale Semiconductor
PXS20 Microcontroller Reference Manual, Rev. 1
31-69