PXS20RM Datasheet, PDF (1001/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

LIN Controller (LINFlexD)
Table 31-10. LINCR1 field descriptions (continued)
Field
Description
RBLM
SLEEP
INIT
Receive Buffer Locked Mode
0: Receive Buffer not locked on overrun. Once the Slave Receive Buffer is full the next incoming
message overwrites the previous one.
1: Receive Buffer locked against overrun. Once the Receive Buffer is full the next incoming message
is discarded.
Note: This bit can be written in Initialization mode only. It is read-only in Normal or Sleep mode.
Sleep Mode Request
This bit is set by software to request LINFlexD to enter Sleep mode.
This bit is cleared by software to exit Sleep mode or by hardware if the AWUM bit in LINCR1 and the
WUF bit in LINSR are set (see Table 31-13).
Initialization Request
The software sets this bit to switch hardware into Initialization mode. If the SLEEP bit is reset, LINFlexD
enters Normal mode when clearing the INIT bit (see Table 31-13).
CFD
1
1
0
0
Table 31-11. Checksum bits configuration
CCD
LINCFR
Checksum sent
1 Read/Write
0 Read-only
1 Read/Write
0 Read-only
None
None
Programmed in LINCFR by bits CF[0:7]
Hardware calculated
Table 31-12. LIN master break length selection
MBL
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
Length
10-bit
11-bit
12-bit
13-bit
14-bit
15-bit
16-bit
17-bit
18-bit
19-bit
20-bit
21-bit
22-bit
23-bit
36-bit
Freescale Semiconductor
PXS20 Microcontroller Reference Manual, Rev. 1
31-25