PXS20RM Datasheet, PDF (1236/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Reset Generation Module (MC_RGM)
When a reset is triggered, the MC_RGM state machine is activated and proceeds through the different
phases (i.e. PHASEn states). Each phase is associated with a particular device reset being provided to the
system. A phase is completed when all corresponding phase completion gates from either the system or
internal to the MC_RGM are acknowledged. The device reset associated with the phase is then released,
and the state machine proceeds to the next phase up to entering the IDLE phase. During this entire process,
the MC_ME state machine is held in RESET mode. Only at the end of the reset sequence, when the IDLE
phase is reached, does the MC_ME enter the DRUN mode.
Alternatively, it is possible for software to configure some reset source events to be converted from a reset
to either a SAFE mode request issued to the MC_ME or to an interrupt issued to the core (see
Section 41.3.1.3, Functional Event Reset Disable Register (RGM_FERD) and Section 41.3.1.5,
Functional Event Alternate Request Register (RGM_FEAR) for ‘functional’ resets).
41.2 External signal description
The MC_RGM interfaces to the bidirectional reset pin RESET_B and the boot mode pins PA[4:2].
41.3 Memory map and register definition
Table 41-1. MC_RGM register summary
Address Name
Description
Size
Access
User Supervisor
Test
Location
0xC3FE RGM_FES
_4000
Functional Event Status
0xC3FE RGM_DES Destructive Event Status
_4002
0xC3FE RGM_FERD Functional Event Reset
_4004
Disable
half-word read
half-word read
half-word read
read/write¹ read/write¹ on page 41-8
read/write¹ read/write¹
read/write² read/write²
on page
41-10
on page
41-12
0xC3FE RGM_DERD Destructive Event Reset half-word read
_4006
Disable
read
read
on page
41-14
0xC3FE RGM_FEAR Functional Event Alternate half-word read
_4010
Request
read/write read/write
on page
41-15
0xC3FE RGM_FESS Functional Event Short
_4018
Sequence
half-word read
read/write read/write
on page
41-16
0xC3FE RGM_FBRE Functional Bidirectional
_401C
Reset Enable
half-word read read/write read/write
on page
41-18
NOTES:
1 _{individual bits cleared on writing ‘1’}
2 _{write once: ‘0’ = enable, ‘1’ = disable.}
NOTE
Any access to unused registers as well as write accesses to read-only
registers will:
• not change register content
41-4
PXS20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor