PXS20RM Datasheet, PDF (66/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Memory Map
Table 2-1. PXS20 memory map, ordered by start address (continued)
Start Address
Size (KB)
PCTL
number
Mode
Region / Module Name
0x8FF4_8000
16
—
DP INTC_1
Off-platform peripherals (mirrored to memory range 0xFFE8_0000–0xFFEF_FFFF)
0xC3F8_8000
16
66
LS/DP Flash 0 configuration (FLASH0)
0xC3F9_0000
16
68
LS/DP System integration unit lite (SIUL)
0xC3F9_4000
16
69
LS/DP Wakeup unit (WKPU)
0xC3FD_8000
16
86
LS/DP System status and configuration module (SSCM)
0xC3FD_C000
16
87
LS/DP Mode entry module (MC_ME)
0xC3FE_0000
16
88
LS/DP Clock generation module (MC_CGM)
0xC3FE_4000
16
89
LS/DP Reset generation module (MC_RGM)
0xC3FE_8000
16
90
LS/DP Power control unit (MC_PCU)
0xC3FF_0000
16
92
LS/DP Periodic interrupt timer (PIT)
0xC3FF_4000
16
93
LS/DP Self-test control unit (STCU)
Off-platform peripherals
0xFFE0_0000
16
32
LS/DP Analog-to-digital converter 0 (ADC_0)
0xFFE0_4000
16
33
LS/DP Analog-to-digital converter 1 (ADC_1)
0xFFE0_C000
16
35
LS/DP Cross triggering unit (CTU)
0xFFE1_8000
16
38
LS/DP eTimer_0
0xFFE1_C000
16
39
LS/DP eTimer_1
0xFFE2_0000
16
40
LS/DP eTimer_2
0xFFE2_4000
16
41
LS/DP FlexPWM_0
0xFFE2_8000
16
42
LS/DP FlexPWM_1
0xFFE4_0000
16
48
LS/DP LINFlexD_0
0xFFE4_4000
16
49
LS/DP LINFlexD_1
0xFFE6_8000
16
58
LS/DP Cyclic redundancy check unit (CRC)
0xFFE6_C000
16
59
LS/DP Fault collection and control unit (FCCU)
0xFFE7_8000
16
62
LS/DP Sine wave generator (SWG)
On Platform 0 Peripherals
0xFFF0_0000
16
—
LS PBRIDGE_0, PBRIDGE_1
DP PBRIDGE_0
0xFFF0_4000
16
—
LS XBAR_0, XBAR_1
DP XBAR_0
0xFFF1_0000
16
—
LS MPU_0, MPU_1
DP MPU_0
0xFFF2_4000
16
—
DP Semaphores (SEMA4_0)
PXS20 Microcontroller Reference Manual, Rev. 1
2-2
Freescale Semiconductor