PXS20RM Datasheet, PDF (1131/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Nexus Port Controller (NPC)
34.4.1.1 Bypass Register
The bypass register is a single-bit shift register path selected for serial data transfer between TDI and TDO
when the BYPASS instruction or any unimplemented instructions are active. After entry into the
Capture-DR state, the single-bit shift register is set to a logic 0. Therefore, the first bit shifted out after
selecting the bypass register is always a logic 0.
34.4.1.2 Instruction Register
The NPC block uses a 4-bit instruction register as shown in Table 34-2. The instruction register is accessed
via the SELECT_IR_SCAN path of the tap controller state machine, and allows instructions to be loaded
into the block to enable the NPC for register access (NEXUS_ENABLE) or select the bypass register as
the shift path from TDI to TDO (BYPASS or unimplemented instructions).
Instructions are shifted in through TDI while the TAP controller is in the Shift-IR state, and latched on the
falling edge of TCK in the Update-IR state. The latched instruction value can only be changed in the
Update-IR and Test-Logic-Reset TAP controller states. Synchronous entry into the Test-Logic-Reset state
results in synchronous loading of the BYPASS instruction. Asynchronous entry into the Test-Logic-Reset
state results in asynchronous loading of the BYPASS instruction. During the Capture-IR TAP controller
state, the instruction register is loaded with the value of the previously executed instruction, making this
value the register’s read value when the TAP controller is sequenced into the Shift-IR state.
R
W
Reset:
0
1
2
3
Previous Instruction Opcode
Instruction Opcode
BYPASS Instruction Opcode (0xF)
Figure 34-2. 4-Bit Instruction Register
34.4.1.3 Nexus Device ID Register (DID)
The device identification register, shown in Figure 34-3, allows the part revision number, design center,
part identification number, and manufacturer identity code of the part to be determined through the
auxiliary output port.
01234
R
Part Revision Number
W
RESET:
PRN
Register index: 0
5678
Design Center
DC
9 10 11 12 13 14 15
Part Identification Number
PIN
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
Part Identification
Manufacturer Identity Code
1
Number
W
RESET:
PIN (cont’d.)
000000011101
= Reserved
Figure 34-3. Nexus Device ID Register
Freescale Semiconductor
PXS20 Microcontroller Reference Manual, Rev. 1
34-7