PXS20RM Datasheet, PDF (1051/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

31.13.1 Master node
LIN Controller (LINFlexD)
Header
Data TX
Checksum TX
Configure ID
DFL, Data buffer
Set HTRQ
DIR = 1
DTF set
TXI Interrupt
Figure 31-57. Programming consideration: master node, transmitter
Header
Data RX
Checksum RX
Configure ID, DFL
Set HTRQ
DIR = 0
and
DDRQ = 0
DRF set
RXI Interrupt
Figure 31-58. Programming consideration: master node, receiver
Header
Configure ID
DFL, Data buffer
Set HTRQ
DIR = 1
Data TX
BEF set
ERRI Interrupt
IOBE = 1
Header
Data TX
Checksum TX
Configure ID
DFL, Data buffer
Set HTRQ
DIR = 1
BEF set
IOBE = 0
ERR Interrupt
DTF set
TX Interrupt
Figure 31-59. Programming consideration: master node, transmitter, bit error
Header
Configure ID, DFL
Set HTRQ
Data RX
DIR = 0
and
DDRQ = 0
Checksum RX
CEF set
ERR Interrupt
Figure 31-60. Programming consideration: master node, receiver, checksum error
Freescale Semiconductor
PXS20 Microcontroller Reference Manual, Rev. 1
31-75