PXS20RM Datasheet, PDF (375/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

e200z4d Core Complex Overview
17.2.3 Memory Management Unit Features
The memory management unit features the following:
• Virtual memory support
• 32-bit virtual and physical addresses
• 8-bit process identifier
• 16-entry fully associative TLB
• Hardware assist for TLB miss exceptions
• Per-entry multiple page size support from 1 Kbyte to 4 Gbyte
• Entry flush protection
• Software managed by tlbre, tlbwe, tlbsx, tlbsync, and tlbivax instructions
• Freescale EIS MMU architecture compliant
• Support for external control of entry matching for a subset of TID values to support non-intrusive
runtime mapping modifications
17.2.4 Exernal core complex interface features
The core complex interface features the following:
• Independent instruction and data buses
• Advanced microcontroller bus architecture (AMBA) AHB 2.v6 protocol
• 32-bit address bus, 64-bit data bus, plus attributes and control
• Separate unidirectional 64-bit read and write data buses
• Support for HCLK running at a slower rate than CPU clock
17.2.5 Nexus 3+ Features
The Nexus 3+ module provides real-time development capabilities for e200z4d processors in compliance
with the IEEE-ISTO 5001™-2003. The ‘3+’ suffix indicates that some Nexus Class 4 features are
available. A portion of the pin interface (the JTAG port) is also shared with the OnCE/Nexus 1 unit.
The following features are implemented:
• Program trace by means of branch trace messaging.
— Branch trace messaging displays program flow discontinuities (direct and indirect branches,
exceptions, etc.), allowing the development tool to interpolate what transpires between the
discontinuities. Thus, static code may be traced.
• Data trace by means of data write messaging and data read messaging.
— Provides the capability for the development tool to trace reads and/or writes to selected internal
memory resources.
• Ownership trace by means of ownership trace messaging (OTM).
Freescale Semiconductor
PXS20 Microcontroller Reference Manual, Rev. 1
17-5