PXS20RM Datasheet, PDF (1000/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

LIN Controller (LINFlexD)
Field
CFD
LASE
AWUM
MBL
BF
SFTM
LBKM
MME
SBDT
Table 31-10. LINCR1 field descriptions (continued)
Description
Checksum field disable
This bit is used to disable the checksum field transmission (see Table 31-11).
0: Checksum field is sent after the required number of data bytes is sent.
1: No checksum field is sent.
Note: This bit can be written in Initialization mode only. It is read-only in Normal or Sleep mode.
LIN Slave Automatic Resynchronization Enable
0: Automatic resynchronization disable
1: Automatic resynchronization enable
Note: This bit can be written in Initialization mode only. It is read-only in Normal or Sleep mode.
Automatic Wake-Up Mode
This bit controls the behavior of the LINFlexD hardware during Sleep mode.
0: The Sleep mode is exited on software request by clearing the SLEEP bit of the LINCR register.
1: The Sleep mode is exited automatically by hardware on RX dominant state detection. The SLEEP
bit of the LINCR register is cleared by hardware whenever WUF bit in LINSR is set.
Note: This bit can be written in Initialization mode only. It is read-only in Normal or Sleep mode.
LIN Master Break Length
These bits indicate the Break length in Master mode (see Table 31-12).
Note: These bits can be written in Initialization mode only. They are read-only in Normal or Sleep
mode.
Bypass filter
0: No interrupt if ID does not match any filter
1: An RX interrupt is generated on ID not matching any filter
Notes:
• If no filter is activated, this bit is reserved.
• This bit can be written in Initialization mode only. It is read-only in Normal or Sleep mode.
Self Test Mode
This bit controls the Self Test mode. For more details please refer to Section 31.8.2, Self Test mode.
0: Self Test mode disable
1: Self Test mode enable
Note: This bit can be written in Initialization mode only. It is read-only in Normal or Sleep mode.
Loop Back Mode
This bit controls the Loop Back mode. For more details please refer to Section 31.8.1, Loop Back
mode.
0: Loop Back mode disable
1: Loop Back mode enable
Note: This bit can be written in Initialization mode only. It is read-only in Normal or Sleep mode
Master Mode Enable
0: Slave mode enable
1: Master mode enable
Note: This bit can be written in Initialization mode only. It is read-only in Normal or Sleep mode.
Slave Mode Break Detection Threshold
0: 11-bit break
1: 10-bit break
Note: This bit can be written in Initialization mode only. It is read-only in Normal or Sleep mode.
31-24
PXS20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor