PXS20RM Datasheet, PDF (1165/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Peripheral Bridge (PBRIDGE)
37.5 Functional description
The PBRIDGE serves as an interface between a system bus and the peripheral (slave) bus. It functions as
a protocol translator. Accesses that fall within the address space of the PBRIDGE are decoded to provide
individual module selects for peripheral devices on the slave bus interface.
There is no need to configure the PBRIDGE registers unless the default master and/or peripheral access
privileges need to be changed.
37.5.1 Access support
Aligned 64-bit word accesses, halfword accesses, and byte accesses are supported for the peripherals.
Peripheral registers must not be misaligned, although no explicit checking is performed by the PBRIDGE.
NOTE
Data accesses that cross a 32-bit boundary are not supported.
37.5.1.1 Peripheral write buffering
Buffered writes are not supported by the PBRIDGE.
37.5.1.2 Read cycles
Two-clock read accesses are possible with the PBRIDGE when the requested access size is 32-bits or
smaller, and is not misaligned across a 32-bit boundary.
37.5.1.3 Write cycles
Three clock write accesses are possible with the PBRIDGE when the requested access size is 32-bits or
smaller. Misaligned writes that cross a 32-bit boundary are not supported.
37.5.2 General operation
Slave peripherals are modules that contain readable/writable control and status registers. The system bus
master reads and writes these registers through the PBRIDGE. The PBRIDGE generates module enables,
the module address, transfer attributes, byte enables, and write data as inputs to the slave peripherals. The
PBRIDGE captures read data from the slave interface and drives it on the system bus.
The PBRIDGE occupies a 64 MB portion of the address space. The register maps of the slave peripherals
are located on 16-KB boundaries. Each slave peripheral is allocated one 16-KB block of the memory map,
and is activated by one of the module enables from the PBRIDGE.
The PBRIDGE is responsible for indicating to slave peripherals if an access is in supervisor or user mode.
All eDMA and FlexRay transfers are done in supervisor mode.
Freescale Semiconductor
PXS20 Microcontroller Reference Manual, Rev. 1
37-7