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PXS20RM Datasheet, PDF (808/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller
FlexRay Communication Controller
buffer with message buffer number n is controlled by the registers FR_MBCCSRn, FR_MBCCFRn,
FR_MBFIDRn, and FR_MBIDXRn.
The connection between the message buffer control registers and the physical message buffer is
established by the message buffer index field MBIDX in the Message Buffer Index Registers
(FR_MBIDXRn). The start address SADR_MBHF of the related message buffer header field in the
FlexRay memory area is determined according to Equation 26-3.
SADR_MBHF = (FR_MBIDXRn[MBIDX] * 10) + SMBA
Eqn. 26-3
(min) FR_MBDSR[MBSEG1DS] * 2 bytes / FR_MBDSR[MBSEG2DS] * 2 bytes
SADR_MBDF
Frame Data
Message Buffer Data Field
SADR_MBHF
Frame Header
Data Field Offset
Slot Status
Message Buffer Header Field
FR_MBCCSRn FR_MBCCFRn FR_MBFIDRn
FR_MBIDXRn
Message Buffer Control Registers
Figure 26-114. Individual Message Buffer Structure
26.6.3.1.1 Individual Message Buffer Segments
The set of the individual message buffers can be split up into two message buffer segments using the
Message Buffer Segment Size and Utilization Register (FR_MBSSUTR). All individual message buffers
with a message buffer number n <= FR_MBSSUTR[LAST_MB_SEG1] belong to the first message buffer
segment. All individual message buffers with a message buffer number n >
FR_MBSSUTR[LAST_MB_SEG1] belong to the second message buffer segment. The following rules
apply to the length of the message buffer data field:
• all physical message buffers associated to individual message buffers that belong to the same
message buffer segment must have message buffer data fields of the same length
• the minimum length of the message buffer data field for individual message buffers in the first
message buffer segment is 2 * FR_MBDSR[MBSEG1DS] bytes
• the minimum length of the message buffer data field for individual message buffers assigned to the
second segment is 2 * FR_MBDSR[MBSEG2DS] bytes.
26.6.3.2 Receive Shadow Buffers
The receive shadow buffers are required for the frame reception process for individual message buffers.
The CC provides four receive shadow buffers, one receive shadow buffer per channel and per message
buffer segment.
26-96
PXS20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor