PXS20RM Datasheet, PDF (1245/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Reset Generation Module (MC_RGM)
Table 41-5. Functional Event Reset Disable Register (RGM_FERD) Field Descriptions
Field
Description
D_EXR
Disable External Reset
0 An external reset event triggers a reset sequence
D_FCCU_H Disable FCCU hard reaction request
ARD
0 A FCCU hard reaction request event triggers a reset sequence
D_FCCU_S Disable FCCU soft reaction request
OFT
0 A FCCU soft reaction request event triggers a reset sequence
D_ST_DON Disable self-test completed
E
0 A self-test completed event triggers a reset sequence
D_CMU12_F Disable CMU1/2 clock freq. too high/low
HL
0 A CMU1/2 clock freq. too high/low event triggers a reset sequence
1 A CMU1/2 clock freq. too high/low event generates either a SAFE mode or an interrupt request
depending on the value of RGM_FEAR.AR_CMU12_FHL
D_FL_ECC_ Disable flash, ECC, or lock-step error
RCC 0 A flash, ECC, or lock-step error event triggers a reset sequence
D_PLL1
Disable PLL1 fail
0 A PLL1 fail event triggers a reset sequence
1 A PLL1 fail event generates either a SAFE mode or an interrupt request depending on the value
of RGM_FEAR.AR_PLL1
D_SWT Disable software watchdog timer
0 A software watchdog timer event triggers a reset sequence
D_FCCU_SA Disable FCCU SAFE mode request
FE
1 A FCCU SAFE mode request event generates a SAFE mode request
D_CMU0_F
HL
Disable system clock freq. too high/low
0 A system clock freq. too high/low event triggers a reset sequence
1 A system clock freq. too high/low event generates either a SAFE mode or an interrupt request
depending on the value of RGM_FEAR.AR_CMU0_FHL
D_CMU0_O
LR
Disable oscillator freq. too low
0 A oscillator freq. too low event triggers a reset sequence
1 A oscillator freq. too low event generates either a SAFE mode or an interrupt request depending
on the value of RGM_FEAR.AR_CMU0_OLR
D_PLL0
Disable PLL0 fail
0 A PLL0 fail event triggers a reset sequence
1 A PLL0 fail event generates either a SAFE mode or an interrupt request depending on the value
of RGM_FEAR.AR_PLL0
D_CWD
Disable core watchdog reset
0 A core watchdog reset event triggers a reset sequence
1 A core watchdog reset event generates either a SAFE mode or an interrupt request depending on
the value of RGM_FEAR.AR_CWD
D_SOFT Disable software ’functional’ reset
(cut1) 0 A software ’functional’ reset event triggers a reset sequence
D_SOFT_FU
NC (cut2/3)
Freescale Semiconductor
PXS20 Microcontroller Reference Manual, Rev. 1
41-13